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John Larkin  
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  More options Jul 6 2008, 12:37 am
Newsgroups: sci.electronics.design
From: John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com>
Date: Sat, 05 Jul 2008 12:37:11 -0700
Local: Sun, Jul 6 2008 12:37 am
Subject: Re: PCB power planes?
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On Sat, 05 Jul 2008 21:04:07 +0200, Martin Griffith

<mart_in_med...@yah00.es> wrote:
>On Sat, 05 Jul 2008 11:53:46 -0700, in sci.electronics.design John
>Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> wrote:

>>On Sat, 05 Jul 2008 20:32:36 +0200, Martin Griffith
>><mart_in_med...@yah00.es> wrote:

>>>Just been looking for ideas
>>>http://www.gennum.com/video/pdf/32469DOC.pdf
>>>and I havent done any multi layer boards, is fig 5.3 on P24 correct?

>>>martin

>>2.1.1 is insane. They can't make up their mind whether to use 0r
>>resistors or beads, so they are still guessing.

>>Splitting grounds is usually a bad idea. Except when it's a terrible
>>idea.

>>Fig 5.3 looks so weird to me that I assume PDF rendering errors. Does
>>anyone else see huge black triangles?

>>2.1.2 suggests sequencing or possible latchup problems. Be careful
>>here; get more info maybe.

>>John
>I get the same triangles, silly idiots for letting something out like
>that in a ref. design.
>I don't think I need all the extra bits, just 1 vid in and an AVR or
>8051  to control it, so I was just going to have a vdd and gnd copper
>flood on the inner layers, get some cheap boards done to test.

>martin

If you're going to do a test board, start with one solid ground plane,
with power planes below/above as needed (likely only one power plane
is necessary here) preferably with thin dielectric between the planes.
Handle any signal integrity/noise problems locally.

It's amazing how many really silly reference design/eval boards there
are.

John


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